1 · Compare phase →Reference − divided VCO0.125 cycles
2 · Loop filter →P corrects now; I remembers0.056 V
3 · VCO →f = f₀ + Kᵥ × V36.67 MHz
4 · Divide by 4 ↴Feed this clock back9.17 MHz
← divided clock returns to the phase detector ←
Feedback divider N
Loop filter
Frequency finds the target
VCON × reference
Phase error settles
Reference − feedback
Model and next lesson
Averaged, linear phase detector with a PI filter; Kᵥ = 12 MHz/V, control voltage limited to ±1 V with anti-windup. Natural frequency and damping describe the unsaturated P + I loop. P-only keeps the same proportional gain. This model illustrates tracking near lock; it does not model PFD cycle slipping, capture range, charge-pump pulses or reference spurs. The phase-step example adds ⅛ cycle to the reference at 10 µs.