Skip to content
Circuits & Systems Classroom

Clock and Data Recovery

GitHub ↗
Guided tour · 1 of 6

Bits arrive, but no clock

Data reaches the receiver as a stream of high and low levels: here tall blocks are 1s and short blocks are 0s. No clock signal comes with it, so the receiver has to decide on its own when to look at each bit. Its reader looks once per bit, and the safest moment is the middle of a block, far from where the level changes.

Look forEach green dot marks one look, with the bit it read floating above it. The dots land mid-block, so every read matches its block.

Incoming data

0 ppm
0.00 UIpp
1 GHz
10 mUI
Pattern

56 GBd NRZ · 1 UI = one bit = 17.86 ps · 0 Hz off · +ppm means the local clock is fast; ±300 ppm is a typical example (10,000 ppm = 1%)

CDR loop

Loop
2 steps
Integral path
Vote every
0 votes

P-only slew ceiling: 2/(64 × 1) × 10⁶ = 31,250 ppm. Random data: about 15,625 ppm; long runs of identical bits reduce tracking.

Playback

5 bits/s

11 billion times slower than the real link

Key

  • tall block: a 1 · short block: a 0
  • where the reader looked, and the bit it read
  • looked too near an edge: the bit may be wrong (?)
  • edge checker early: clock moves later
  • edge checker late: clock moves earlier
  • same bit on both sides: no verdict
Reader off-centre0mUI rms
Learned clock error—ppm

Wrapped timing error, including random jitter. 1,000 mUI = 1 bit. The integral path estimates the clock offset.

Model: ideal early/late decisions at known transitions, a 64-step phase interpolator, and a fixed 0.6 UI timing window. Analog slicer noise and Alexander three-sample logic are not simulated.

No CDR · the clocks happen to match 0 slips · 0 margin violations / 0 bits
Phase trackingdata edges recovered clock
phase / UI-0.500.5−0 UInow

Where the data edges are and where the loop puts its clock, in UI. Locked, the lines run together.

Eye · loop off
Eye · without

Every bit drawn on top of the others, lined up by the clock. An open eye in the middle gives the reader a clean place to look.

Jitter tolerancelimit applied
jitter / UIpp0.010.11101 MHz10 MHz100 MHz1 GHzcomputing…

Enable the CDR loop to calculate its jitter tolerance.

Circuits & Systems Classroom
MIT License ↗
© 2026 Token Zhang— visitors · — views